1 industrial temperature range idt74fst32xl2384 20-bit bus switch january 2004 industrial temperature range the idt logo is a registered trademark of integrated device technology, inc. ? 2004 integrated device technology, inc. dsc-4708/2 features: ? bus switches provide zero delay paths ? low switch on-resistance; 28 ? ? ? ? ? ? ttl-compatible input and output levels ? esd > 2000v per mil-std-883, method 3015; > 200v using machine model (c = 200pf, r = 0) ? available in tssop package functional block diagram idt74fst32xl2384 20-bit bus switch description: the fst32xl2384 belongs to idt's family of bus switches. bus switch devices perform the function of connecting or isolating two ports without providing any inherent current sink or source capability. thus they generate little or no noise of their own while providing a low resistance path for an external driver. these devices connect input and output ports through an n-channel fet. when the gate-to-source junction of this fet is adequately forward-biased the device conducts and the resistance be- tween input and output ports is small. without adequate bias on the gate- to-source junction of the fet, the fet is turned off, therefore with no v cc applied, the device has hot insertion capability. the low on-resistance and simplicity of the connection between input and output ports reduces the delay in this path to close to zero. the fst32xl2384 is a 20-bit ttl-compatible bus switch. the bex pins provide enable control. a 0 b 0 a 4 b 4 b 5 b 9 a 5 a 9 bea bec a 10 b 10 a 14 b 14 b 15 b 19 a 15 a 19 bed beb
2 industrial temperature range idt74fst32xl2384 20-bit bus switch tssop top view pin configuration symbol description max unit v term (2) terminal voltage with respect to gnd ?0.5 to +7 v t stg storage temperature ?65 to +150 c i out maximum continuous channel current 128 ma absolute maximum ratings (1) notes: 1. stresses greater than those listed under absolute maximum ratings may cause permanent damage to the device. this is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect reliability. 2. vcc, control, and switch terminals. pin names i/o description a 0 - a 19 i/o bus a b 0 - b 19 i/o bus b bea i enable, 0-4 beb i enable, 15-19 bec i enable, 5-9 bed i enable, 10-14 pin description symbol parameter conditions (2) typ. unit c in control input capacitance 4 pf c i/o switch input/output capacitance switch off 8 pf capacitance (1) notes: 1. capacitance is characterized but not tested. 2. t a = 25c, f = 1mhz, v in = 0v, v out = 0v. note: 1. h = high voltage level l = low voltage level z = high-impedance function table (1) bea beb b 0 - b 4 b 15 - b 19 description h h z z disconnect lha 0 - a 4 z connect hl za 15 - a 19 connect lla 0 - a 4 a 15 - a 19 connect bec bed b 0 - b 4 b 15 - b 19 description h h z z disconnect lha 5 - a 9 z connect hl za 10 - a 14 connect lla 5 - a 9 a 10 - a 14 connect 5 6 7 8 9 10 1 2 3 4 46 45 44 43 42 41 40 39 38 37 b 4 b 0 a 0 a 1 b 1 b 2 a 2 a 3 b 3 a 19 a 18 b 18 b 17 a 17 a 16 b 16 b 15 vcc b 19 bea a 4 11 12 47 48 gnd a 15 beb 17 18 19 20 21 22 13 14 15 16 34 33 32 31 30 29 28 27 26 25 b 9 b 5 a 5 a 6 b 6 b 7 a 7 a 8 b 8 b 14 a 13 b 13 b 12 a 12 a 11 b 11 b 10 vcc a 14 bec a 9 23 24 35 36 gnd a 10 bed
3 industrial temperature range idt74fst32xl2384 20-bit bus switch symbol parameter test conditions (1) min. typ. (2) max. unit v ih input high voltage guaranteed logic high for control inputs 2 ? ? v v il input low voltage guaranteed logic low for control inputs ? ? 0.8 v i ih input high current v cc = max. v i = v cc ?? 1a i il input low current v i = gnd ? ? 1 i ozh high impedance output current v cc = max. v o = v cc ?? 1a i ozl (3-state output pins) v o = gnd ? ? 1 i os short circuit current vcc = max., v o = gnd (3) ? 300 ? ma v ik clamp diode voltage v cc = min., i in = ?18ma ? ?0.7 ?1.2 v r on switch on resistance (4) vcc = min., v in = 0v, i on = 30ma 20 28 40 ? vcc = min., v in = 2.4v, i on = 15ma 20 35 48 i off input/output power off leakage v cc = 0v, v in or v o 4.5v ? ? 1a i cc quiescent power supply current v cc = max., v i = gnd or v cc ? 0.1 3 a dc electrical characteristics over operating range following conditions apply unless otherwise specified: industrial: t a = ?40c to +85c, v cc = 5.0v 10% notes: 1. for conditions shown as max. or min., use appropriate value specified under electrical characteristics for the applicable dev ice type. 2. typical values are at vcc = 5.0v, +25c ambient. 3. not more than one output should be shorted at one time. duration of the test should not exceed one second. 4. measured by voltage drop between ports at indicated current through the switch. symbol parameter test conditions (1) min. typ. (2) max. unit ? i cc quiescent power supply current v cc = max. ? 0.5 1.5 ma ttl inputs high v in = 3.4v (3) i ccd dynamic power supply v cc = max., outputs open v in = v cc ? 30 40 a/ current (4,5) enable pin toggling v in = gnd mhz/ 50% duty cycle switch i c total power supply current (6) v cc = max., outputs open v in = v cc ?68ma enable pins toggling v in = gnd (20 switches toggling) f i = 10mhz v in = 3.4v ? 7 11 50% duty cycle v in = gnd power supply characteristics notes: 1. for conditions shown as max. or min., use appropriate value specified under electrical characteristics for the applicable dev ice type. 2. typical values are at v cc = 5.0v, +25c ambient. 3. per ttl driven input (v in = 3.4v). all other inputs at v cc or gnd. 4. this parameter is not directly testable, but is derived for use in total power supply calculations. 5. values for these conditions are examples of the icc formula. these limits are guaranteed but not tested. 6. i c = i quiescent + i inputs + i dynamic i c = i cc + ? i cc d h n t + i ccd (f i n) i cc = quiescent current ? i cc = power supply current for a ttl high input (v in = 3.4v) d h = duty cycle for ttl inputs high n t = number of ttl inputs at d h i ccd = dynamic current caused by an input transition pair (hlh or lhl) f i = control input frequency n = number of control inputs toggling at f i all currents are in milliamps and all frequencies are in megahertz.
4 industrial temperature range idt74fst32xl2384 20-bit bus switch switching characteristics over operating range following conditions apply unless otherwise specified: industrial: t a = -40c to +85c, v cc = 5.0v 10% symbol description (1) condition min. typ. max. unit t plh data propagation delay c l = 50pf ? ? 1.25 ns t phl ax to bx, bx to ax (3,4) r l = 500 ? t pzh switch turn on delay 1.5 ? 7.5 ns t pzl bex to ax, bx t phz switch turn off delay 1.5 ? 5.5 ns t plz bex to ax, bx (3) |q ci | charge injection (5,6) ? 1.5 ? pc notes: 1. see test circuit and waveforms. 2. minimum limits guaranteed but not tested. 3. this parameter is guaranteed by design but not tested. 4. the bus switch contributes no propagation delay other than the rc delay of the on resistance of the switch and the load capac itance. the time constant for the switch alone is of the order of 2.5ns for 50pf load. since this time is constant and much smaller than the rise/fall times of typical driving signals, it adds very little propagation delay to the system. propagation delay on the bus switch when used in a system is determined by the driving circuit on the driving side of the switc h and its interaction with the load on the driven side. 5. measured at switch turn off, load = 50 pf in parallel with 10 m ? scope probe, v in = 0.0 volts. 6. characterized parameter. not 100% tested.
5 industrial temperature range idt74fst32xl2384 20-bit bus switch pulse generator r t d.u.t . v cc v in c l v out 50pf 500 ? 500 ? 7.0v 3v 1.5v 0v 3v 1.5v 0v 3v 1.5v 0v 3v 1.5v 0v data input timing input asynchronous control preset clear etc. synchronous control t su t h t rem t su t h high-low-high pulse low-high-low pulse t w 1.5v 1.5v same phase input transition 3v 1.5v 0v 1.5v v oh t plh output opposite phase input transition 3v 1.5v 0v t plh t phl t phl v ol control input 3v 1.5v 0v 3.5v 0v output normally low output normally high switch closed switch open v ol 0.3v 0.3v t plz t pzl t pzh t phz 3.5v 0v 1.5v 1.5v enable disable v oh preset clear clock enable etc. octal link octal link octal link octal link octal link test circuits and waveforms test circuits for all outputs enable and disable times set-up, hold, and release times pulse width notes: 1. diagram shown for input control enable-low and input control disable-high. 2. pulse generator for all pulses: rate 1.0mhz; t f 2.5ns; t r 2.5ns. propagation delay test switch open drain disable low closed enable low all other tests open switch position definitions: c l = load capacitance: includes jig and probe capacitance. r t = termination resistance: should be equal to z out of the pulse generator.
6 industrial temperature range idt74fst32xl2384 20-bit bus switch ordering information corporate headquarters for sales: for tech support: 2975 stender way 800-345-7015 or 408-727-6116 logichelp@idt.com santa clara, ca 95054 fax: 408-492-8674 (408) 654-6459 www.idt.com 5/24/2002 removed tvsop package data sheet document history idt xx temp. range xxxxxxx device type xx package 74 ? 40 c to +85 c pa 32xl2384 thin shrink small outline package 20-bit bus switch fst
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